Abstract
A wireless communication system. The system comprises transmitter circuitry (BST 1) the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a secondary synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences in the plurality of sequences. The third sequence comprises a subset of bits from the first sequence.
Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | |||||
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Declaration Date | Declaration Reference | Declaring Company | Specification Information | ||||||
3G | 04/04/2008 | ISLD-200804-017 | TEXAS INSTRUMENTS INC | No | Family Member | ||||
3G | 22/03/2012 | ISLD-201203-017 | TEXAS INSTRUMENTS INC | Yes | Family Member | ||||
3G | 27/03/2017 | ISLD-201703-153 | INTEL CORP | Yes | Family Member | ||||
4G | 27/03/2017 | ISLD-201703-153 | INTEL CORP | Yes | Family Member |
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