Abstract
A digital beamforming network for transmitting a first number of digital information signal using a second number of antenna array elements is disclosed. Assemblers are used for assembling one information bit selected from each of the information signals into a bit vector. Digital processors have an input for the bit vector and a number of outputs equal to the second number of antenna elements and process the bit vector. Finally modulation waveform generators coupled to each of the second number of outputs generate a signal for transmission by each antenna element.
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Not Available | 23/05/2002 | ISLD-200205-001 | ERICSSON INC | No | Family Member |
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US5909460A | Not Available | 23/05/2002 | ISLD-200205-001 | ERICSSON INC |
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CA2239513A1 | Not Available | 23/05/2002 | ISLD-200205-001 | ERICSSON INC |
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US6219375B1 | Not Available | 23/05/2002 | ISLD-200205-001 | ERICSSON INC |
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KR100433966B1 | Not Available | 23/05/2002 | ISLD-200205-001 | ERICSSON INC |
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Claim
1. A digital beamformer for receiving a first number of information signals using a second number of antenna array elements, comprising:', 'for each of said antenna elements receiver means comprising filtering means, amplification means and hardlimiting means for producing a two level signal;', 'digital processing means comprising a number of inputs corresponding to said second number of antenna elements and calculating a number of outputs corresponding to said first number of signals;', 'timing means for selecting said two-level signals for simultaneous application to said inputs of said digital processor and for selecting said outputs from said digital processor to represent said information signals.
2. The beamformer according to claim 1, wherein said receiver means further comprise downconverting means.
3. A digital beamformer for receiving a first number of information signals using a second number of antenna array elements, comprising:', 'for each of said antenna elements receiver means comprising filtering means, amplification means and quantizing means for producing two quantized amplified received signals to a real sign bit and an imaginary sign bit;', 'digital processing means comprising a number of inputs corresponding to said second number of antenna elements and calculating a number of outputs corresponding to said first number of signals;', 'timing means for selecting real sign bits for simultaneous application to said inputs of said digital processor alternately with said imaginary bits to obtain first real and first imaginary value alternating with a second real and second imaginary value for each of said number of digital processor outputs;', 'combining means for combining said first real with said second imaginary values and said first imaginary with said second real values to obtain for each of said information signals a corresponding complex representative value.
4. A digital beamformer for receiving a first number of information signals using a second number of antenna array elements, comprising:', 'for each of said antenna elements receiver means comprising filtering means, amplification means and complex digital to analog conversion means for producing a quantized real binary value and a quantized imaginary binary value;', 'digital processing means comprising a number of inputs corresponding to said second number of antenna elements and calculating a number of outputs corresponding to said first number of signals;', 'timing means for selecting bits of corresponding significance from said real values for simultaneous application to said inputs of said digital processor alternating with selected bits of corresponding significance from said imaginary values to obtain first real and first imaginary value alternating with a second real and second imaginary value for each of said number of digital processor outputs;', 'accumulating means for accumulating said first real and said second imaginary values and said first imaginary values taking into account said selected bit significance to obtain a real accumulated value and said first imaginary with said second real values likewise to obtain an imaginary accumulated value, said real and said imaginary accumulated values being obtained in correspondence to each of said digital processor outputs to represent complex samples of each of said information signals.']
Associated Portfolios

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SUMMARY
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The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)
The information in grey was provided by the patent holder
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Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.
Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.
Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.
Family member:related patents or applications that share a common priority or original filing.