DE4224530A1

Not Available

Title

Not Available

Application Number:

DE19924224530

Publication Date:

28-01-1993

Current Assignee:

Family ID:

Application Date:

24-07-1992

Publication Country:

US

Priority Date:

25-07-1991

Declaring Company:

Abstract  Abstract

A processor for generating a Walsh transform by computing M combinations of M input values ??substantially simultaneously where M = 2 ? N ? and the input values ??are twos complement binary values has N stages electrically connected in series each stage having a cross network of M electrical conductors in a predetermined pattern connected to a set of M / 2 butterfly circuits the butterfly circuits having means for calculating sums and differences through their corresponding cross networks of submitted values ??and submit the sums and differences to corresponding ladders of the cross network of the next stages. The input values ??are presented to the first-stage cross-network serially and with the least significant bits first and substantially simultaneously with this the Walsh transform of the input values ??is serially generated by the N-th stage butterfly circuits.

Note:

The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)

The information in grey was provided by the patent holder

The information in purple was extracted from the FrandAvenue

Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.

Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.

Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.

Family member:related patents or applications that share a common priority or original filing.