Abstract
A processor for generating a Walsh transform by substantially simultaneously calculating M combinations of M input values wherein M = 2<N> and the input values are twos-complement binary values has N stages electrically connected in sequence wherein each stage has a criss-cross network 11 of M conductors electrically connected in a predetermined pattern to a set of M/2 butterflies 12 the butterflies having devices for calculating sums and differences of respective values presented by their respective criss-cross networks and presenting the sums and differences to respective conductors of the next stages criss-cross network. The input values are presented to the criss-cross network of the first stage serially and least-significant-bit first; and substantially synchronously therewith the Walsh transform of the input values is serially produced by the butterflies of the N-th stage. <IMAGE>
| Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | |||||
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| Declaration Date | Declaration Reference | Declaring Company | Specification Information | ||||||
| Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| US5357454A | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| DE4224530A1 | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| DE4224530B4 | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| FR2679722A1 | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| FR2679722B1 | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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No | Family Member | |||
| GB2258746B | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| HK20996A | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| SE515268C2 | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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| SE9202209L | Not Available | 22/10/1998 | ISLD-190001-020 | ERICSSON INC |
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