Abstract
Method and System for Utilization of an Outer Decoder in a Broadcast Services Communication System is described. Information to be transmitted is provided to a systematic portion of a plurality of transmit buffers and encoded by an outer decoder communicatively coupled to the transmit buffer. The resulting redundant bits are provided to a parity portion of each transmit buffer. The content of the transmit buffers is multiplexed and encoded by an inner decoder to improve protection by adding redundancy. The receiving station recovers the transmitted information by an inverse process. Because a decoding complexity depends on the size of a systematic portion of the transmit buffer reasoned compromise between a systematic portion size and number of transmit buffers yields decreased decoding complexity.
Method and System for Utilization of an Outer Decoder in a Broadcast Services Communication System is described. Information to be transmitted is provided to a systematic portion of a plurality of transmit buffers and encoded by an outer decoder communicatively coupled to the transmit buffer. The resulting redundant bits are provided to a parity portion of each transmit buffer. The content of the transmit buffers is multiplexed and encoded by an inner decoder to improve protection by adding redundancy. The receiving station recovers the transmitted information by an inverse process. Because a decoding complexity depends on the size of a systematic portion of the transmit buffer reasoned compromise between a systematic portion size and number of transmit buffers yields decreased decoding complexity.
| Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | |||||
|---|---|---|---|---|---|---|---|---|---|
| Declaration Date | Declaration Reference | Declaring Company | Specification Number | ||||||
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Specification Information
Specification Information
Technologies
Family Information
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| Publication No | Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | Status | National Phase Entries | |||||
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S1
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Technologies
Signal Processing
Product
Use Cases
Network OptimizationWireless communication
Services
Claim
1. An encoding method for reducing decoding complexity, the method comprising: encoding systematic bits in each of a plurality of buffers with a first code; multiplexing content of the plurality of buffers; and encoding said multiplexed content with as second code to provide a set of frames.
2. The method as claimed in claim 1 wherein said encoding systematic bits in each of a plurality of buffers with an first code comprises: encoding systematic bits in each of the plurality of buffers with a block code.
3. The method as claimed in claim 1 wherein said encoding systematic bits in each of a plurality of buffers with a block code comprises: encoding systematic bits in each of the plurality of buffers with a Reed- Solomon code.
4. The method as claimed in claim 1 wherein said multiplexing content of the plurality of buffers comprises: providing a block of bits successively from each of the plurality of buffers.
5. The method claimed in claim 4 wherein said providing a block of bits successively from each of the plurality of buffers comprises: providing a block of bits comprising a row of each of the plurality of buffers.
6. The method claimed in claim 1 wherein said encoding said multiplexed content with an second code to provide a set of frames comprises: identifying a block of bits to be encoded; and encoding the block of bits with a second code.
7. The method claimed in claim 6 wherein said identifying a block of bits to be encoded comprises: identifying a block of bits received from a buffer.
8. A method reducing decoding complexity, comprising: decoding received frames by an second decoder; de-multiplexing correctly decoded frame to a plurality of buffers; and processing content of each of the plurality of buffers.
9. The method as claimed in claim 8 wherein said de-multiplexing correctly decoded frame to a plurality of buffers comprises: identifying a block of bits belonging to a buffer; and providing the block of bits to the buffer
10. The method as claimed in claim 9 wherein said identifying a block of bits belonging to a buffer comprises: identifying a block of bits comprising a frame decoded by the second decoder
11. The method as claimed in claim 8 wherein said processing content of each of the plurality of buffers comprises: providing systematic portion of each of the plurality of buffers to higher layers
12. The method as claimed in claim 8 further comprising: providing indication of an erasure to a decoder communicatively coupled to the buffer that would receive the correctly decoded frame if the frame failed to decode correctly
13. The method as claimed in claim 12 wherein said processing content of each of the plurality of buffers comprises: decoding the systematic portion of the buffer by a decoder when the systematic portion is recoverable; and providing the systematic portion of each of the plurality of buffer to higher layers
14. A method for reducing decoding complexity, comprising: encoding systematic bits in each of a plurality of transmit buffers with an first code; multiplexing content of the plurality of buffers; encoding said multiplexed content with an second code to provide a set of frames; transmitting the set of frames; decoding received frames by an second decoder; de-multiplexing correctly decoded frame to a plurality of receive buffers; and processing content of each received buffer
15. The method as claimed in claim 16 wherein said encoding systematic bits in each of a plurality of transmit buffers with an first code comprises: encoding systematic bits in each of a plurality of buffers with a block code
16. The method as claimed in claim 15 wherein said encoding systematic bits in each of a plurality of buffers with a block code comprises: encoding systematic bits in each of a plurality of buffers with a Reed- Solomon code
17. The method as claimed in claim 14 wherein said multiplexing content of the plurality of first buffers comprises: providing a block of bits successively from each buffer
18. The method claimed in claim 17 wherein said providing a block of bits successively from each buffer comprises: providing a block of bits comprising a row of the transmitting buffer
19. The method claimed in claim 14 wherein said encoding said multiplexed content with an second code to provide a set of frames comprises: identifying a block of bits to be encoded; and encoding the block of bits with an second code.
20. The method claimed in claim 19 wherein said identifying a block of bits to be encoded comprises: identifying the block of bits as a block of bits received from a buffer.
21. The method as claimed in claim 14 wherein said de-multiplexing correctly decoded frame to a plurality of receive buffers comprises: identifying a block of bits belonging to a buffer; and providing the block of bits to the buffer.
22. The method as claimed in claim 21 wherein said identifying a block of bits belonging to a buffer comprises: identifying a block of bits as a block of bits comprising a frame decoded by the second decoder.
23. The method as claimed in claim 14 wherein said processing content of each receive buffer comprises: providing systematic portion of each buffer to higher layers.
24. The method as claimed in claim 14 further comprising: providing indication of an erasure to an first decoder communicatively coupled to the receive buffer that would receive the correctly decoded frame if the frame failed to decode correctly.
25. The method as claimed in claim 24 wherein said processing content of each buffer comprises: decoding the systematic portion of the buffer by an first decoder when the systematic portion is recoverable; and providing systematic portion of each buffer to higher layers.
25 provide a correctly decoded frame; and provide indication of an erasure if the received frame failed to decode correctly.
26. An apparatus for reducing decoding complexity, comprising: a plurality of buffers; a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of buffers; a multiplexer communicatively coupled to said plurality of buffers; and an inner encoder communicatively coupled to said multiplexer.
27. The apparatus as claimed in claim 26 wherein each of said plurality of buffers is configured to: store systematic bits and parity bits.
28. The apparatus as claimed in claim 26 wherein each of each of said plurality of encoders is configured to: encode systematic bits to provide parity bits.
29. The apparatus as claimed in claim 28 wherein each of said plurality of encoders is configured to: encode the systematic bits with a block code.
30. The apparatus as claimed in claim 26 wherein each of each of said plurality of encoders is configured to: encode the systematic bits with a Reed-Solomon code.
31. The apparatus claimed in claim 26 wherein said multiplexer is configured to: provide a block of bits successively from each of said plurality of buffers to said inner encoder.
32. The apparatus as claimed in claim 31 wherein said block of bits comprises a row of said buffer.
33. The apparatus as claimed in claim 26 wherein said inner encoder is configured to: identify a block of bits to be encoded; and encode the block of bits with an inner code.
34. The apparatus as claimed in claim 33 wherein said block of bits to be encoded comprises: a block of bits received from said multiplexer.
35. An apparatus for reducing decoding complexity, comprising: an first decoder; a de-multiplexer communicatively coupled to said first decoder; a plurality of buffers communicatively coupled to said de-multiplexer; and a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of buffers.
36. The method as claimed in claim 35 wherein said first decoder is configured to: decode a received frame; provide a correctly decoded frame; and provide indication of an erasure if the received frame failed to decode correctly.
37. The apparatus as claimed in claim 35 wherein said de-multiplexer is configured to: identify a block of bits belonging to a buffer; and provide the block of bits to the buffer.
38. The apparatus as claimed in claim 37 wherein said block of bits belonging to a buffer comprises: a block of bits comprising a frame decoded by said first decoder.
39. The method as claimed in claim 35 wherein each of said plurality of decoders is configured to: decode the systematic portion of the buffer by an outer decoder when the systematic portion is recoverable.
40. The apparatus as claimed in claim 35 wherein each of said plurality of buffers is configured to: provide systematic portion to higher layers.
41. An apparatus for reducing decoding complexity, comprising: a plurality of transmit buffers; a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of transmit buffers; a multiplexer communicatively coupled to said plurality of transmit buffers; an inner encoder communicatively coupled to said multiplexer; a first decoder; a de-multiplexer communicatively coupled to said first decoder; a plurality of receive buffers communicatively coupled to said demultiplexer; and a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of receive buffers.
42. The apparatus as claimed in claim 41 wherein each of said plurality of transmit buffers is configured to: store systematic bits and parity bits.
43. The apparatus as claimed in claim 41 wherein each of each of said plurality of encoders is configured to: encode systematic bits to provide parity bits.
44. The apparatus as claimed in claim 43 wherein each of said plurality of encoders is configured to: encode the systematic bits with a block code.
45. The apparatus as claimed in claim 41 wherein each of each of said plurality of encoders is configured to: encode the systematic bits with a Reed-Solomon code.
46. The apparatus claimed in claim 41 wherein said multiplexer is configured to: provide a block of bits successively from each of said plurality of transmit buffers to said inner encoder.
47. The apparatus as claimed in claim 46 wherein said block of bits comprises a row of said buffer.
48. The apparatus as claimed in claim 41 wherein said inner encoder is configured to: identify a block of bits to be encoded; and encode the block of bits with an inner code.
49. The apparatus as claimed in claim 48 wherein the block of bits to be encoded comprises: a block of bits received from said multiplexer.
50. The method as claimed in claim 41 wherein said first decoder is configured to: decode a received frame; 020020
51. The apparatus as claimed in claim 41 wherein said de-multiplexer is configured to: identify a block of bits belonging to a buffer; and provide the block of bits to the buffer.
52. The apparatus as claimed in claim 51 wherein said block of bits belonging to a buffer comprises: a block of bits comprising a frame decoded by said first decoder.
53. The method as claimed in claim 41 wherein each of said plurality of decoders is configured to: decode the systematic portion of the buffer by an outer decoder when the systematic portion is recoverable.
54. The apparatus as claimed in claim 41 wherein each of said plurality of buffers is configured to: provide systematic portion of the buffer to higher layers.']
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SUMMARY
ClaimChart-EP1435134A2-STO
Patent number:EP1435134A2
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The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)
The information in grey was provided by the patent holder
The information in purple was extracted from the FrandAvenue
Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.
Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.
Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.
Family member:related patents or applications that share a common priority or original filing.