Abstract
Method and System for Utilization of an Outer Decoder in a Broadcast Services Communication System is described. Information to be transmitted is provided to a systematic portion of a plurality of transmit buffers and encoded by an outer decoder communicatively coupled to the transmit buffer. The resulting redundant bits are provided to a parity portion of each transmit buffer. The content of the transmit buffers is multiplexed and encoded by an inner decoder to improve protection by adding redundancy. The receiving station recovers the transmitted information by an inverse process. Because a decoding complexity depends on the size of a systematic portion of the transmit buffer reasoned compromise between a systematic portion size and number of transmit buffers yields decreased decoding complexity.
Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | |||||
---|---|---|---|---|---|---|---|---|---|
Declaration Date | Declaration Reference | Declaring Company | Specification Number | ||||||
3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member |
Specification Information
Specification Information
Technologies
Family Information
All Granted Patents In Patent Family : | ---- |
All Pending Patents In Patent Family : | ---- |
Publication No | Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | |||||
---|---|---|---|---|---|---|---|---|---|---|
Declaration Date | Declaration Reference | Declaring Company | Specification Number | |||||||
US2003072384A1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Basis Patent | ||||
US2003072384A1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Basis Patent | ||||
US2003072384A1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Basis Patent | ||||
US2003072384A1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Basis Patent | ||||
US2003072384A1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | Yes | Basis Patent | ||||
US7649829B2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Basis Patent | ||||
US7649829B2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Basis Patent | ||||
US7649829B2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Basis Patent | ||||
US7649829B2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Basis Patent | ||||
US7649829B2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | Yes | Basis Patent | ||||
US2010107041A1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
US2010107041A1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
US2010107041A1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
US2010107041A1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
US2010107041A1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
US8713400B2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
US8713400B2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
US8713400B2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
US8713400B2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
US8713400B2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
CN1602588A | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN1602588A | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN1602588A | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
CN1602588A | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
CN1602588A | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
CN1602588B | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN1602588B | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN1602588B | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
CN1602588B | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
CN1602588B | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP1435134A2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134A2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134A2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134A2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134A2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP1435134B1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134B1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134B1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134B1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP1435134B1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
TW569544B | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
TW569544B | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | Yes | Family Member | ||||
TW569544B | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
TW569544B | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
TW569544B | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
AT470994T | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
AT470994T | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
AT470994T | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
AT470994T | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
AT470994T | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
AU2002342013A1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
AU2002342013A1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
AU2002342013A1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
AU2002342013A1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
AU2002342013A1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
CN101867448A | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101867448A | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101867448A | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101867448A | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101867448A | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
CN101867448B | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101867448B | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101867448B | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101867448B | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101867448B | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
CN101848064A | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101848064A | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101848064A | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101848064A | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101848064A | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
CN101848064B | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101848064B | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
CN101848064B | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101848064B | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
CN101848064B | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP2239856A2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2239856A2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2239856A2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2239856A2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2239856A2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP2239856A3 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2239856A3 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2239856A3 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2239856A3 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2239856A3 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP2239856B1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2239856B1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2239856B1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2239856B1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2239856B1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP2242181A2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2242181A2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2242181A2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2242181A2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2242181A2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP2242181A3 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2242181A3 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2242181A3 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2242181A3 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2242181A3 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
EP2242181B1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2242181B1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
EP2242181B1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2242181B1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
EP2242181B1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
JP2005532701A | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
JP2005532701A | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
JP2005532701A | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
JP2005532701A | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
JP2005532701A | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
JP4274942B2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
JP4274942B2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
JP4274942B2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
JP4274942B2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
JP4274942B2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
US2010272124A1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
US2010272124A1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
US2010272124A1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
US2010272124A1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | Yes | Family Member | ||||
US2010272124A1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
WO03034598A2 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
WO03034598A2 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
WO03034598A2 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
WO03034598A2 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
WO03034598A2 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
WO03034598A3 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
WO03034598A3 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
WO03034598A3 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
WO03034598A3 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
WO03034598A3 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
BR0213215A | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
BR0213215A | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
BR0213215A | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
BR0213215A | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
BR0213215A | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
ES2402472T3 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
ES2402472T3 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
ES2402472T3 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
ES2402472T3 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
ES2402472T3 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
KR100892891B1 | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
KR100892891B1 | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
KR100892891B1 | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
KR100892891B1 | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
KR100892891B1 | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member | ||||
KR20040041687A | 3G | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
KR20040041687A | Not Available | 25/05/2010 | ISLD-201007-015 | QUALCOMM INC | No | Family Member | ||||
KR20040041687A | 5G,4G,3G | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
KR20040041687A | Not Available | 28/02/2011 | ISLD-201104-002 | QUALCOMM INC | No | Family Member | ||||
KR20040041687A | 5G | 15/03/2022 | ISLD-202203-095 | QUALCOMM INC | No | Family Member |
Publication No | Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | Status | National Phase Entries | |||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Declaration Date | Declaration Reference | Declaring Company | Specification Information | |||||||||
----- | ----- | ----- | ----- | ----- |
S1
|
----- | ----- | ----- | ----- |
Technologies

Product
Use Cases


Services
Claim
1. A method for reducing decoding complexity, the method comprising:
encoding systematic bits stored in each of a plurality of buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;
multiplexing content in the plurality of buffers; and
encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;
wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'encoding systematic bits stored in each of a plurality of buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;', 'multiplexing content in the plurality of buffers; and', 'encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;', 'wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.
2. The method as claimed in claim 1 wherein said encoding systematic bits in each of the plurality of buffers with the first code comprises:
encoding systematic bits in each row of the plurality of buffers using the Reed-Solomon code.', 'encoding systematic bits in each row of the plurality of buffers using the Reed-Solomon code.
3. The method as claimed in claim 1 wherein said encoding systematic bits in each of the plurality of buffers with the first code comprises:
encoding systematic bits in each column of the plurality of buffers using the Reed-Solomon code.', 'encoding systematic bits in each column of the plurality of buffers using the Reed-Solomon code.
4. The method as claimed in claim 1 wherein said multiplexing content of the plurality of buffers comprises:
providing a block of bits successively from each of the plurality of buffers.', 'providing a block of bits successively from each of the plurality of buffers.
5. The method claimed in claim 4 wherein
the block of bits comprises a row of each of the plurality of buffers.', 'the block of bits comprises a row of each of the plurality of buffers.
6. The method claimed in claim 1 wherein said encoding said multiplexed content with the second code to provide the set of frames comprises:
identifying a block of bits to be encoded; and
encoding the block of bits with the second code.', 'identifying a block of bits to be encoded; and', 'encoding the block of bits with the second code.
7. The method claimed in claim 6 wherein said identifying the block of bits to be encoded comprises:
identifying the block of bits received from one buffer.', 'identifying the block of bits received from one buffer.
8. A method for reducing decoding complexity, comprising:
encoding systematic bits stored in each of a plurality of transmit buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;
multiplexing content in the plurality of transmit buffers;
encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;
transmitting the set of frames;
decoding received frames by a second decoder;
de-multiplexing correctly decoded frames to a plurality of receive buffers; and
processing content of each of the plurality of receive buffers, said content of each of the plurality of receive buffers including a systematic portion and a parity portion,
wherein each of the plurality of transmit buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'encoding systematic bits stored in each of a plurality of transmit buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;', 'multiplexing content in the plurality of transmit buffers;', 'encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;', 'transmitting the set of frames;', 'decoding received frames by a second decoder;', 'de-multiplexing correctly decoded frames to a plurality of receive buffers; and', 'processing content of each of the plurality of receive buffers, said content of each of the plurality of receive buffers including a systematic portion and a parity portion,', 'wherein each of the plurality of transmit buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.
9. The method as claimed in claim 8 wherein said encoding systematic bits stored in each of the plurality of transmit buffers with the first code comprises:
encoding systematic bits in each row of the plurality of buffers using the Reed-Solomon code.', 'encoding systematic bits in each row of the plurality of buffers using the Reed-Solomon code
10. The method as claimed in claim 9 wherein said encoding systematic bits in each of the plurality of buffers using the Reed-Solomon code comprises:
encoding systematic bits in each column of the plurality of buffers with a Reed-Solomon code.', 'encoding systematic bits in each column of the plurality of buffers with a Reed-Solomon code
11. The method as claimed in claim 8 wherein said multiplexing content of the plurality of transmit buffers comprises:
providing a block of bits successively from each buffer.', 'providing a block of bits successively from each buffer
12. The method claimed in claim 11 wherein
the block of bits comprises a row of the transmitting buffer.', 'the block of bits comprises a row of the transmitting buffer
13. The method claimed in claim 8 wherein said encoding said multiplexed content with the second code to provide the set of frames comprises:
identifying a block of bits to be encoded; and
encoding the block of bits with the second code.', 'identifying a block of bits to be encoded; and', 'encoding the block of bits with the second code
14. The method claimed in claim 13 wherein said identifying the block of bits to be encoded comprises:
identifying the block of bits as one block of bits received from one buffer.', 'identifying the block of bits as one block of bits received from one buffer
15. The method as claimed in claim 8 wherein said de-multiplexing correctly decoded frame to the plurality of receive buffers comprises:
identifying a block of bits belonging to one buffer; and
providing the block of bits to the buffer.', 'identifying a block of bits belonging to one buffer; and', 'providing the block of bits to the buffer
16. The method as claimed in claim 15 wherein said identifying the block of bits belonging to the buffer comprises:
identifying the block of bits as one block of bits comprising one frame decoded by the second decoder.', 'identifying the block of bits as one block of bits comprising one frame decoded by the second decoder
17. The method as claimed in claim 8 wherein said processing content of each receive buffer comprises:
providing the systematic portion of each receive buffer to layers higher than a physical layer.', 'providing the systematic portion of each receive buffer to layers higher than a physical layer.18. The method as claimed in claim 8 further comprising:
providing indication of an erasure to a first decoder communicatively coupled to the plurality of receive buffers configured to receive one correctly decoded frame.', 'providing indication of an erasure to a first decoder communicatively coupled to the plurality of receive buffers configured to receive one correctly decoded frame.19. The method as claimed in claim 18 wherein said processing content of each of the plurality of receive buffers comprises:
decoding the systematic portion of one receive buffer by the first decoder when the systematic portion of the one receive buffer is recoverable; and
providing the decoded systematic portion of the one receive buffer to layers higher than a physical layer.', 'decoding the systematic portion of one receive buffer by the first decoder when the systematic portion of the one receive buffer is recoverable; and', 'providing the decoded systematic portion of the one receive buffer to layers higher than a physical layer.
20. An apparatus for reducing decoding complexity, comprising:
a plurality of buffers;
a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of buffers for encoding systematic bits stored in the one of said plurality of buffers using a Reed-Solomon code to generate Reed-Solomon encoded bits;
a multiplexer communicatively coupled to said plurality of buffers for multiplexing content in the plurality of buffers; and
an inner encoder communicatively coupled to said multiplexer for encoding said multiplexed content,
wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'a plurality of buffers;', 'a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of buffers for encoding systematic bits stored in the one of said plurality of buffers using a Reed-Solomon code to generate Reed-Solomon encoded bits;', 'a multiplexer communicatively coupled to said plurality of buffers for multiplexing content in the plurality of buffers; and', 'an inner encoder communicatively coupled to said multiplexer for encoding said multiplexed content,', 'wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.
21. The apparatus as claimed in claim 20 wherein each of said plurality of buffers is configured to:
store systematic bits and parity bits.', 'store systematic bits and parity bits.
22. The apparatus as claimed in claim 20 wherein each of said plurality of encoders is configured to:
encode systematic bits to provide parity bits.', 'encode systematic bits to provide parity bits.
23. The apparatus as claimed in claim 22 wherein each of said plurality of encoders is configured to:
encode the systematic bits using the Reed Solomon code.', 'encode the systematic bits using the Reed Solomon code.
24. The apparatus as claimed in claim 20 wherein each of said plurality of encoders is configured to:
encode the systematic bits using the Reed-Solomon code.', 'encode the systematic bits using the Reed-Solomon code.
25. The apparatus claimed in claim 20 wherein said multiplexer is configured to:
provide a block of bits successively from each of said plurality of buffers to said inner encoder.', 'provide a block of bits successively from each of said plurality of buffers to said inner encoder.
26. The apparatus as claimed in claim 25 wherein said block of bits comprises a row of said buffer.
27. The apparatus as claimed in claim 20 wherein said inner encoder is configured to:
identify a block of bits to be encoded; and
encode the block of bits with an inner code.', 'identify a block of bits to be encoded; and', 'encode the block of bits with an inner code.
28. The apparatus as claimed in claim 27 wherein said block of bits to be encoded comprises:
one block of bits received from said multiplexer.', 'one block of bits received from said multiplexer.
29. An apparatus for reducing decoding complexity, comprising:
a plurality of transmit buffers;
a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of transmit buffers for encoding systematic bits stored in the respective transmit buffer using a Reed-Solomon code to generate Reed-Solomon encoded bits;
a multiplexer communicatively coupled to said plurality of transmit buffers for multiplexing content in the plurality of transmit buffers;
an inner encoder communicatively coupled to said multiplexer for encoding said multiplexed content, wherein encoding the multiplexed content comprises adding overhead bits to the multiplexed content;
a first decoder;
a de-multiplexer communicatively coupled to said first decoder;
a plurality of receive buffers communicatively coupled to said demultiplexer, wherein content of each receive buffer includes systematic portion and parity portion; and
a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of receive buffers,
wherein each of the plurality of transmit buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'a plurality of transmit buffers;', 'a plurality of encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of transmit buffers for encoding systematic bits stored in the respective transmit buffer using a Reed-Solomon code to generate Reed-Solomon encoded bits;', 'a multiplexer communicatively coupled to said plurality of transmit buffers for multiplexing content in the plurality of transmit buffers;', 'an inner encoder communicatively coupled to said multiplexer for encoding said multiplexed content, wherein encoding the multiplexed content comprises adding overhead bits to the multiplexed content;', 'a first decoder;', 'a de-multiplexer communicatively coupled to said first decoder;', 'a plurality of receive buffers communicatively coupled to said demultiplexer, wherein content of each receive buffer includes systematic portion and parity portion; and', 'a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of receive buffers,', 'wherein each of the plurality of transmit buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.
30. The apparatus as claimed in claim 29 wherein each of said plurality of transmit buffers is configured to:
store systematic bits and parity bits.', 'store systematic bits and parity bits.
31. The apparatus as claimed in claim 29 wherein each of said plurality of encoders is configured to:
encode systematic bits to provide parity bits.', 'encode systematic bits to provide parity bits.
32. The apparatus as claimed in claim 31 wherein each of said plurality of encoders is configured to:
encode the systematic bits using the Reed-Solomon code.', 'encode the systematic bits using the Reed-Solomon code.
33. The apparatus as claimed in claim 29 wherein each of said plurality of encoders is configured to:
encode the systematic bits with the Reed-Solomon code.', 'encode the systematic bits with the Reed-Solomon code.
34. The apparatus claimed in claim 29 wherein said multiplexer is configured to:
provide a block of bits successively from each of said plurality of transmit buffers to said inner encoder.', 'provide a block of bits successively from each of said plurality of transmit buffers to said inner encoder.
35. The apparatus as claimed in claim 34 wherein said block of bits comprises a row of said transmit buffer.
36. The apparatus as claimed in claim 29 wherein said inner encoder is configured to:
identify a block of bits to be encoded; and
encode the block of bits with an inner code.', 'identify a block of bits to be encoded; and', 'encode the block of bits with an inner code.
37. The apparatus as claimed in claim 36 wherein the block of bits to be encoded comprises:
one block of bits received from said multiplexer.', 'one block of bits received from said multiplexer.
38. The apparatus as claimed in claim 29 wherein said first decoder is configured to:
decode a received frame;
provide a correctly decoded frame; and
provide indication of an erasure if the received frame failed to decode correctly.', 'decode a received frame;', 'provide a correctly decoded frame; and', 'provide indication of an erasure if the received frame failed to decode correctly.
39. The apparatus as claimed in claim 29 wherein said de-multiplexer is configured to:
identify a block of bits belonging to a receive buffer; and
provide the block of bits to the receive buffer.', 'identify a block of bits belonging to a receive buffer; and', 'provide the block of bits to the receive buffer.
40. The apparatus as claimed in claim 39 wherein said block of bits belonging to a receive buffer comprises:
one block of bits comprising one frame decoded by said first decoder.', 'one block of bits comprising one frame decoded by said first decoder.
41. The apparatus as claimed in claim 29 wherein each of said plurality of decoders is configured to:
decode the systematic portion of the receive buffer by an outer decoder when the systematic portion is recoverable and
providing the decoded systematic portion of the receive buffer to layers higher than a physical layer.', 'decode the systematic portion of the receive buffer by an outer decoder when the systematic portion is recoverable and', 'providing the decoded systematic portion of the receive buffer to layers higher than a physical layer.
42. A memory encoded with codes for executing instruction to cause a processor to perform:
encoding systematic bits stored in each of a plurality of buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;
multiplexing content in the plurality of buffers; and
encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;
wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'encoding systematic bits stored in each of a plurality of buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;', 'multiplexing content in the plurality of buffers; and', 'encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;', 'wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.
43. A memory encoded with codes for executing instruction to cause a processor to perform:
encoding systematic bits stored in each of a plurality of transmit buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;
multiplexing content in the plurality of transmit buffers;
encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;
transmitting the set of frames;
decoding received frames by a second decoder;
de-multiplexing correctly decoded frames to a plurality of receive buffers; and
processing content of each of the plurality of receive buffers, said content of each of the plurality of receive buffers including a systematic portion and a parity portion,
wherein each of the plurality of transmit buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'encoding systematic bits stored in each of a plurality of transmit buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;', 'multiplexing content in the plurality of transmit buffers;', 'encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content;', 'transmitting the set of frames;', 'decoding received frames by a second decoder;', 'de-multiplexing correctly decoded frames to a plurality of receive buffers; and', 'processing content of each of the plurality of receive buffers, said content of each of the plurality of receive buffers including a systematic portion and a parity portion,', 'wherein each of the plurality of transmit buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.
44. An encoding apparatus for reducing decoding complexity, comprising:
means for encoding systematic bits stored in each of a plurality of buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;
means for multiplexing content in the plurality of buffers; and
means for encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content,
wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.', 'means for encoding systematic bits stored in each of a plurality of buffers with a first code, wherein the first code comprises a Reed-Solomon code and the encoding of the systematic bits generates Reed-Solomon encoded bits;', 'means for multiplexing content in the plurality of buffers; and', 'means for encoding said multiplexed content with a second code to provide a set of frames, wherein encoding the multiplexed content with the second code comprises adding overhead bits to the multiplexed content,', 'wherein each of the plurality of buffers comprises a systematic buffer configured to store the systematic bits before and the Reed-Solomon encoded bits after the encoding of the systematic bits, and a parity buffer configured to store Reed-Solomon encoded bits when the systematic buffer is full.']
Associated Portfolios

![]() |
![]() |
![]() |
![]() |
---|---|---|---|
Claim charts will soon be available!
|
SUMMARY
ClaimChart-US8730999B2-STO
Patent number:US8730999B2
Claim Chart Type : SEP Claim Chart
Price: 200 €
To view claim charts you must become a Gold or Platinum Member.
Upgrade your subscriptionYou have reached the maximum number of patents which can be associated to your account per your subscription. If you wish to associate more patents
Please upgrade your subscription.Note:
The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)
The information in grey was provided by the patent holder
The information in purple was extracted from the FrandAvenue
Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.
Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.
Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.
Family member:related patents or applications that share a common priority or original filing.