PL3429084T3

Title

Not Available

Application Number:

PL18181216T

Publication Date:

20-12-2021

Current Assignee:

Family ID:

Application Date:

14-11-2011

Declaring Company:

Publication Country:

US

Priority Date:

22-11-2010

Title

Not Available

Application Number:

PL18181216T

Family ID:

Publication Country:

US

Publication Date:

20-12-2021

Application Date:

14-11-2011

Priority Date:

22-11-2010

Current Assignee:

Declaring Company:

Abstract  Abstract

The present invention relates to a data processing device and a data processing method for reducing peak to average power ratio (PAPR) and for limiting the modification and complexity necessary for achieving the PAPR reduction in a classical DVB-T2 receiver.Control data are first scrambled. Then the scrambled control data are padded with dummy bits.The scrambled data and the padding bits undergo concatenated coding, the concatenated coding consisting first of Bose-Chaudhuri-Hocquenghem, BCH, encoding and then of Low Density Parity Check, LDPC, encoding. Prior to transmission and in order to limit the amount of transmitted bits, parity bits of the LDPC code are punctured and dummy data are removed from the transmitted data.A frame is built containing the punctured LDPC and BCH coded scrambled control data without padding bits, a preamble in the frame including a symbol including information that the frame contains the punctured LDPC and BCH coded scrambled control data without padding bits, and the frame is multiplexed in a DVB-T2 signal.

Note:

The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)

The information in grey was provided by the patent holder

The information in purple was extracted from the FrandAvenue

Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.

Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.

Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.

Family member:related patents or applications that share a common priority or original filing.