Abstract
A FIR chip is used in a wireless subscriber unit. The subscriber unit includes a processor for transcoding an input signal to provide digital input symbols. A received output signal is demodulated. Digital output symbols are synthesized from the demodulated output signal processor and filtered digital input symbols are provided. An internal address decoder decodes to allow the processor to access internal functions of the FIR chip. A control and status register allows the processor to read the status of and control the internal functions of the FIR chip. A FIR filter filters the digital input symbols. A transmit timer controls timing which allows the processor to control the FIR filter. A receive timer generates timing signals for timing transcoding operations and synthesizing operations connected to the processor.
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| 2G | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | No | Family Member | ||||
| 2G | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | Yes | Basis Patent | ||||
| Not Available | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | No | Family Member | ||||
| Not Available | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | Yes | Basis Patent | ||||
| 2G | 13/09/2009 | ISLD-200911-005 | INTERDIGITAL INC |
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Yes | Basis Patent | |||
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