Abstract
A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip a DIF (digital intermediate frequency) chip a single prccessor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.
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| 2G | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | No | Family Member | ||||
| 2G | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | Yes | Basis Patent | ||||
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| Not Available | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | Yes | Basis Patent | ||||
| 2G | 13/09/2009 | ISLD-200911-005 | INTERDIGITAL INC |
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Specification Information
Specification Information
Technologies
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| US5644602A | 2G | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | Yes | Basis Patent | ||||
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| US5644602A | 2G | 07/04/2004 | ISLD-200407-005 | INTERDIGITAL INC | No | Family Member | ||||
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| US2004190645A1 | 2G | 13/09/2009 | ISLD-200911-005 | INTERDIGITAL INC |
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| Publication No | Technology | Declaration Information | Specification Information | Explicitly Disclosed | Patent Type | Status | National Phase Entries | |||||
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Technologies
Multiple access
Product
Use Cases
Services
Claim
1. A digital synthesizer comprising:a digital accumulator which accumulates phase increment data and provides digitized phase values; a waveform generator associated with said accumulator which generates a digital intermediate frequency signal based on the digitized phase values of the accumulated phase increment data; and a filter to decrease noise in the digital intermediate frequency signal.', 'a digital accumulator which accumulates phase increment data and provides digitized phase values;', 'a waveform generator associated with said accumulator which generates a digital intermediate frequency signal based on the digitized phase values of the accumulated phase increment data; and', 'a filter to decrease noise in the digital intermediate frequency signal.
2. The digital synthesizer of claim 1 further comprising a modulator which modulates the digital intermediate frequency signal before filtering, having an input connected to said waveform generator and an output connected to said filter.
3. The digital synthesizer of claim 2 wherein said waveform generator generates SIN and COS waveforms using a combination of coarse and fine estimate values.
4. The digital synthesizer of claim 1 wherein said waveform generator generates SIN and COS waveforms using a combination of coarse and fine estimate values.
5. The digital synthesizer of claim 1 wherein said filter is a notch filter.
6. A direct digital synthesizer for use in a communication system which includes at least one processor comprising:a register which stores phase increment data from the processor; an accumulator which accumulates the phase increment data and outputs digitized phase values; a waveform generator which generates SIN and COS sinusoidal function signals from the digitized phase values; a modulator combines SIN and COS function signals received from said waveform generator and modulates a digital intermediate frequency signal based on the accumulated phase increment data; and a filter which reduces noise in the digital intermediate frequency signal.', 'a register which stores phase increment data from the processor;', 'an accumulator which accumulates the phase increment data and outputs digitized phase values;', 'a waveform generator which generates SIN and COS sinusoidal function signals from the digitized phase values;', 'a modulator combines SIN and COS function signals received from said waveform generator and modulates a digital intermediate frequency signal based on the accumulated phase increment data; and', 'a filter which reduces noise in the digital intermediate frequency signal.
7. The digital synthesizer of claim 6 wherein said waveform generator generates SIN and COS waveforms using a combination of coarse and fine estimate values.
8. The digital synthesizer of claim 6 wherein said filter is a notch filter.
9. A subscriber unit for wireless communication with a base station in a wireless communication system comprising:a radio which receives communication signals and transmits an RF signal; a processor for processing said received communication signals and for providing phase data and digital input symbols; and a direct digital synthesizer including:an accumulator which accumulates said phase data that indicates a predetermined intermediate frequency; a waveform generator associated with said accumulator which generates a digital intermediate frequency signal at the predetermined intermediate frequency indicated by the accumulated phase data; and a filter which reduces noise in the digital intermediate frequency signal.', 'a radio which receives communication signals and transmits an RF signal;', 'a processor for processing said received communication signals and for providing phase data and digital input symbols; and', 'a direct digital synthesizer including:an accumulator which accumulates said phase data that indicates a predetermined intermediate frequency; a waveform generator associated with said accumulator which generates a digital intermediate frequency signal at the predetermined intermediate frequency indicated by the accumulated phase data; and a filter which reduces noise in the digital intermediate frequency signal.', 'an accumulator which accumulates said phase data that indicates a predetermined intermediate frequency;', 'a waveform generator associated with said accumulator which generates a digital intermediate frequency signal at the predetermined intermediate frequency indicated by the accumulated phase data; and', 'a filter which reduces noise in the digital intermediate frequency signal
10. The subscriber unit of claim 9 further comprising a digital to analog converter which converts the digital intermediate frequency signal to an analog signal which is output to said radio whereby said radio uses the converted digital intermediate frequency signal to demodulate received communication signals
11. The subscriber unit of claim 9 wherein said digital synthesizer includes a modulator which modulates the digital intermediate frequency signal, having an input connected to said waveform generator and an output connected to said filter
12. The subscriber unit of claim 11 wherein said modulator uses said digital input symbols to modulate the digital intermediate frequency signal
13. The subscriber unit of claim 12 further comprising a digital to analog converter to convert the modulated, filtered digital intermediate frequency signal to an analog signal for transmission by said radio as said RF signal
14. The digital synthesizer of claim 11 wherein said filter is a notch filter
15. The subscriber unit according to claim 11 further comprising digital input symbols provided by said processor based on a baseband digital input signal to said modulator
16. The subscriber unit of claim 15 wherein said digital synthesizer includes tuning registers for providing the phase data to said accumulator and a processor decoder responsive to said processor which controls said registers that stores said phase data for further processing by said accumulator and said waveform generator
17. The subscriber unit of claim 16 wherein the digital synthesizer is embodied in a semiconductor chip
18. The subscriber unit of claim 16 wherein said filter is a notch filter
19. The subscriber unit of claim 15 further comprising:an interpolator which accumulates I and Q samples from said processor and provides accumulated I and Q samples to said modulator which in turn mixes SIN and COS waveforms provided by said waveform generator with the accumulated I and Q samples to produce the modulated digital intermediate frequency signal.', 'an interpolator which accumulates I and Q samples from said processor and provides accumulated I and Q samples to said modulator which in turn mixes SIN and COS waveforms provided by said waveform generator with the accumulated I and Q samples to produce the modulated digital intermediate frequency signal.
20. The subscriber unit of claim 19 wherein said processor is able to generate constant I and Q samples whereby said modulator produces a modulated digital intermediate frequency signal which has no modulation when said constant I and Q samples are generated.']
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SUMMARY
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Patent number:US6078629A
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The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)
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Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.
Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.
Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.
Family member:related patents or applications that share a common priority or original filing.