Abstract
A digital demodulator and method for demodulating digital data representing a phase shift keyed (PSK) signal are provided. The demodulator comprises a phase detector automatic frequency controller automatic timing recovery controller data decoder and unique word detector. According to the method of the present invention a PSK signal is received and digitized to substantially remove the signals amplitude characteristics. The phase detector receives an input of the digital data and based upon transitions in the data from a high state to low state and from a low state to a high state provides phase estimates. The phase estimates are converted by the data decoder into binary data representing the symbols transmitted to form the PSK signal. A number of overlapping windows of digital data are used to determine phase estimates. The unique word detector receives an input of binary data from the data decoder and using a correlation technique identifies one set of windows which substantially maximizes synchronization of the demodulator with the received PSK signal. After the synchronizing window has been identified the automatic frequency controller monitors any frequency drift of the PSK signal and corrects the phase estimates based on the frequency error. The automatic timing recovery controller uses the corrected phase errors from early and late windows with respect to the synchronizing window to adjust the timing of the synchronizing window by advancing or delaying the demodulators symbol timing signal to further maximize synchronization with the received PSK signal.
Technologies
Power Control
Product
Use Cases
Wireless communication
Services
Claim
1. A phase detector for use in a receiver of a digital communications system, said receiver being capable of receiving a phase shift keyed (PSK) signal representing a sequence of transmitted symbols and converting the PSK signal so received into digital data comprising digital samples, the phase detector comprising:an instantaneous phase decoder having an input of said digital data, said instantaneous phase detector determining if a transition between consecutive digital samples has occurred such that one of 1) one digital sample has a value associated with a high level and a subsequent digital sample has a value associated with a low level, and 2) one digital sample has a value associated with said low level and a subsequent digital sample has a value associated with said high level, and providing a decoded output representative of each said transitions; an instantaneous phase estimator having an input coupled to said instantaneous phase decoder to receive said decoded output, said instantaneous phase estimator generating average phase estimates based on said transitions and providing an output of said average phase estimates, wherein each of the symbols is a associated with one of a set of known phases and each phase estimate is associated with a symbol of the received PSK signal; and a format converter operatively interfaced with said output of said instantaneous phase estimator, said format converter identifying, for each phase estimate, one of the known phases associated therewith and providing a first binary representation related to the known phase so identified and providing a second binary representation indicative of a difference between said identified known phase and said phase estimate.', 'an instantaneous phase decoder having an input of said digital data, said instantaneous phase detector determining if a transition between consecutive digital samples has occurred such that one of 1) one digital sample has a value associated with a high level and a subsequent digital sample has a value associated with a low level, and 2) one digital sample has a value associated with said low level and a subsequent digital sample has a value associated with said high level, and providing a decoded output representative of each said transitions;', 'an instantaneous phase estimator having an input coupled to said instantaneous phase decoder to receive said decoded output, said instantaneous phase estimator generating average phase estimates based on said transitions and providing an output of said average phase estimates, wherein each of the symbols is a associated with one of a set of known phases and each phase estimate is associated with a symbol of the received PSK signal; and', 'a format converter operatively interfaced with said output of said instantaneous phase estimator, said format converter identifying, for each phase estimate, one of the known phases associated therewith and providing a first binary representation related to the known phase so identified and providing a second binary representation indicative of a difference between said identified known phase and said phase estimate.
2. The phase detector of claim 1, wherein said instantaneous phase estimator averages a number of phase estimates to produce an average phase estimate.
3. The phase detector of claim 1, wherein each symbol is associated with a phase characteristic of the PSK signal, said instantaneous phase estimator comprising:a counter for incrementing a counter value related to an instantaneous phase of said PSK signal; and an accumulator having a first input coupled to an output of said counter and a second input coupled to said instantaneous phase decoder, said accumulator accumulating said counter values upon each determination that a transition has occurred, said accumulation resulting in a cumulative counter value.', 'a counter for incrementing a counter value related to an instantaneous phase of said PSK signal; and', 'an accumulator having a first input coupled to an output of said counter and a second input coupled to said instantaneous phase decoder, said accumulator accumulating said counter values upon each determination that a transition has occurred, said accumulation resulting in a cumulative counter value.
4. The phase detector of claim 1, further comprising:a differential phase detector having an input coupled to said instantaneous phase estimator, said differential phase detector generating an output representative of a difference between each phase estimate and a previous phase estimate.', 'a differential phase detector having an input coupled to said instantaneous phase estimator, said differential phase detector generating an output representative of a difference between each phase estimate and a previous phase estimate.
5. A method of determining the phase of a phase shift keyed (PSK) symbol received by a receiver used in a digital communications system, comprising the steps of:accepting an input of digital samples, each digital sample having a high level or a low level; identifying transitions from said high level to said low level and from said low level to said high level between successive digital samples; and generating a phase estimate based on said transitions so identified by carrying out at least the following steps:starting a counter at the beginning of each window to provide an output of increasing counter values; incrementing the counter values at a rate defining a sampling rate; and accumulating counter values corresponding to instances at which a predetermined number of consecutive transitions have been identified, said accumulation of counter values being related to said phase estimate.', 'accepting an input of digital samples, each digital sample having a high level or a low level;', 'identifying transitions from said high level to said low level and from said low level to said high level between successive digital samples; and', 'generating a phase estimate based on said transitions so identified by carrying out at least the following steps:starting a counter at the beginning of each window to provide an output of increasing counter values; incrementing the counter values at a rate defining a sampling rate; and accumulating counter values corresponding to instances at which a predetermined number of consecutive transitions have been identified, said accumulation of counter values being related to said phase estimate.', 'starting a counter at the beginning of each window to provide an output of increasing counter values;', 'incrementing the counter values at a rate defining a sampling rate; and', 'accumulating counter values corresponding to instances at which a predetermined number of consecutive transitions have been identified, said accumulation of counter values being related to said phase estimate.
6. The method of claim 5, further comprising the steps of:generating a number of phase estimates for each symbol received; and averaging said number of phase estimates over a period of time defining a window to provide an averaged phase estimate.', 'generating a number of phase estimates for each symbol received; and', 'averaging said number of phase estimates over a period of time defining a window to provide an averaged phase estimate.
7. The method of claim 5, wherein a period of time over which each symbol is received defines a symbol period and said step of generating said phase estimate comprises the steps of:generating a ramp signal having a lowest value corresponding to the beginning of each window, said ramp signal increasing in value over a period of time; and accumulating the values of said ramp signal corresponding to instances when transitions are identified, said accumulation resulting in a cumulative value.', 'generating a ramp signal having a lowest value corresponding to the beginning of each window, said ramp signal increasing in value over a period of time; and', 'accumulating the values of said ramp signal corresponding to instances when transitions are identified, said accumulation resulting in a cumulative value.
8. The method of claim 7, further comprising the step of:subtracting a predetermined phase offset from each value of said ramp signal corresponding to each transition from said high level to said low level.', 'subtracting a predetermined phase offset from each value of said ramp signal corresponding to each transition from said high level to said low level.', '9. The method of claim 7, wherein said step of generating said ramp signal is implemented using a counter.', '10. The method of claim 7, wherein said ramp signal is generated for a time substantially equal to one half of said window period, each said phase estimate being represented by said cumulative value for each one half of said window period, further comprising the step of:adding together said each two consecutive cumulative values and defining the sum as an average phase estimate.', 'adding together said each two consecutive cumulative values and defining the sum as an average phase estimate.', '11. The method of claim 5, further comprising the step of:generating an interpolated counter value in the event that said predetermined number of consecutive transitions are not identified, said interpolated value being based on a difference between counter values corresponding to two consecutive transitions.', 'generating an interpolated counter value in the event that said predetermined number of consecutive transitions are not identified, said interpolated value being based on a difference between counter values corresponding to two consecutive transitions.', '12. The method of claim 5, further comprising the step of:subtracting a predetermined value indicative of a phase offset from said accumulation of counter values if a first counter value of the accumulated counter values corresponds to a transition from said high level to said low level.', 'subtracting a predetermined value indicative of a phase offset from said accumulation of counter values if a first counter value of the accumulated counter values corresponds to a transition from said high level to said low level.']
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SUMMARY
ClaimChart-US5610949A-STO
Patent number:US5610949A
Claim Chart Type : SEP Claim Chart
Price: 200 €
Note:
The information in blue was extracted from the third parties (Standard Setting Organisation, Espacenet)
The information in grey was provided by the patent holder
The information in purple was extracted from the FrandAvenue
Explicitly disclosed patent:openly and comprehensibly describes all details of the invention in the patent document.
Implicitly disclosed patent:does not explicitly state certain aspects of the invention, but still allows for these to be inferred from the information provided.
Basis patent:The core patent in a family, outlining the fundamental invention from which related patents or applications originate.
Family member:related patents or applications that share a common priority or original filing.